The Memory Bottleneck Made Investors Rich For 3 Years, Now CXL Looks like The Next Play

DRAM prices have surged nearly fivefold in some markets, and Micron's CEO expects conditions to get even tighter through 2028. Three companies are betting that an obscure interconnect standard called CXL becomes the infrastructure trade of the decade, but their…

Published October 13, 2026, 5:13am ET · 10 min read

Handful of Memory Modules (DRAM, NAND)
© Shutterstock

The current memory landscape

As the AI infrastructure buildout continues supply for all kinds of commodities, energy and overall computer commodities are put under pressure. In turn, prices of memory modules are skyrocketing. According to TrendForce, conventional DRAM contract prices rose 90% to 95% quarter over quarter in the first quarter of 2026 alone.

CXL offers one possible relief valve. This open interconnect standard lets servers access additional memory, including older modules that data centers would otherwise discard. Marvell ($MRVL), Astera Labs($ALAB) and Penguin Solutions ($PENG) are three of the companies building products around it, each from a different position in the stack.

On Micron’s fiscal fourth-quarter earnings call, CEO Sanjay Mehrotra discussed the outlook for memory supply. He expects supply-demand conditions to be “much tighter in calendar 2027 and 2028 than they were in 2026.” If that holds, companies that help data centers get more from their existing memory could emerge as clear winners. These three companies are among them.

Why memory is running short

Since memory manufacturers follow the JEDEC’s interface standardization process. Each manufacturer uses its own production process, but once built, memory modules from different suppliers are essentially interchangeable. In turn, memory has traditionally been considered a commodity in the computer hardware sector.

The forefront companies in the DRAM manufacturing sector include the American Micron, and the South Korean SK Hynix and Samsung Electronics. These companies lead in the manufacturing processes and have in fact innovated in memory architectures that have later standardized into JEDEC. The HBM pioneered by SK Hynix and AMD, set the base for 3D stacked DRAM architectures which optimize space and as of today, enable the most complex computer systems, such as NVIDIA’s GPUs. HBM stacks several DRAM dies on top of each other. As a result, it consumes roughly three to four times as much wafer capacity per bit as standard DRAM. HBM is now absorbing a growing share of the industry’s advanced capacity.
For instance, a single NVIDIA Rubin GPU supports up to 288 GB of HBM4 memory, while TrendForce expects Rubin Ultra to reach 384 GB per GPU in 2027.

The price shock

The effects in industrial and retail clients are already perceptible. As mentioned, conventional DRAM contract prices rose 90% to 95% quarter over quarter in the first quarter of 2026. On the retail side, according to TrendForce, in August 2026 Germany’s DDR5 price index, which measures the retail price for DDR5 DRAM modules, rose from 445% to 486% of its July 2025 level. The nearly fivefold increase in price hit 32 GB and 64 GB modules.

The effects are also visible in trade data. South Korea, home to SK Hynix and Samsung, reported record semiconductor exports of $60.3 billion in September 2026, up 262.8% from a year earlier, according to the Ministry of Trade, Industry and Energy. 

How the industry is easing the memory shortage

As the computation demand keeps increasing, mitigations to the problem are looked at by manufacturers, and consumers alike. For instance, memory optimization techniques have been promising. For instance TurboQuant, by Google Research, is a compression algorithm focused in KV Cache, used by Models to temporarily store calculations during inference. The algorithm reduces the KV cache necessary by at least 6 times.

Other companies in the semiconductor and memory space such as Marvell focus their efforts in reutilizing older memory modules with products such as the Structera family, otherwise discarded into e-waste. Marvell’s technology focuses on CXL, an open standard interconnect protocol built on PCIe that lets a server’s CPU access additional memory attached through a CXL controller, as if it were another memory channel. Therefore, allowing for older generation memory modules such as DDR4 reusability. The company estimates that hyperscalers in the U.S. and China have deployed about 22 exabytes of DDR4, roughly 22 billion GB, that could be put back to work this way, therefore mitigating today’s shortage.

Other companies such as Astera Labs and Penguin Solutions also have a broad catalogue of solutions to mitigate the problem.

CXL

Compute Express Link, known as CXL, is an open interconnect standard that connects processors with devices such as accelerators and memory expanders. CXL runs on top of the PCIe physical layer and combines three protocols. CXL.io handles device discovery and configuration, much like standard PCIe. CXL.cache lets a device coherently cache the host’s memory. CXL.mem lets a CPU read and write memory on an external device as if it were its own. This presents two main advantages. First, memory expansion as more memory is available regardless of the number of memory channels or DIMM slots the processor supports. Second, pooling in which several servers can draw memory from a shared pool on demand, so less memory sits idle and less is required overall.

Moreover, CXL can also optimize the memory utilization. In 2023 a study from Azure cloud, Microsoft found that DRAM accounts for about half of server cost, yet up to 25% of it can sit stranded: memory left over once all of a server’s cores are rented out, which cannot be rented on its own. Microsoft estimated that pooling memory through CXL could cut DRAM needs by 7% to 9%.

In summary, CXL helps data centers make better use of the DRAM they already own. Several servers can draw from a shared memory pool instead of leaving memory idle. Moreover, CXL’s strongest selling point may be its ability to give older DRAM modules a second life. Marvell estimates that hyperscalers have deployed about 22 exabytes of DDR4 that they could retire as they move to DDR5. 

Each company approaches CXL differently. Marvell and Astera design their own CXL chips, while Penguin Solutions integrates chips from other companies into finished products. 

Memory Sharing and Pooling Example from Astera Labs

https://www.asteralabs.com/wp-content/uploads/2026/09/Product_Brief_Leo-X-Leo-2_Smart_Memory_Controllers_Final-1.pdf

Memory Sharing and Pooling. Credits from Astera Labs

 

CXL Risks

CXL is no silver bullet. PCIe lanes and the extra steps between the processor and the memory limit its flexibility. Memory attached to the processor sits on a direct path to the CPU’s integrated memory controller. CXL memory, by contrast, must travel over PCIe lanes, through a separate controller on the device, and back. Each of the steps introduces more latency.

Independent measurements show latencies between 214 and 394 nanoseconds, compared to 81 to 117 in traditional DDR memory, a 264 to 336% increase. That places CXL in a new tier in the memory hierarchy. Slower than DRAM but faster than SSDs. In this scenario the OS is key to choosing which memory to use.

As explored earlier, CXL is valuable as a strategy to mitigate higher memory costs and reduce the overall cost of ownership. But CXL adds latency and requires extra controllers. That trade-off may only make sense while the memory shortage lasts and cheaper DRAM does not flood the market. The main candidate to do so is the Chinese company CXMT, which grew its share of the global DRAM market from 3% to 8% in a year and is using the proceeds of its IPO to expand capacity. For now, U.S. export controls have limited its output, and its prices sit only 5% to 10% below those of Samsung and SK hynix. But if its expansion succeeds, cheaper DRAM could reduce the need for CXL, especially for reusing older modules. Pooling, however, addresses a utilization problem that exists regardless of price, since idle memory is a result of how memory is allocated.

Marvell

The fabless company started in the late 90s as a HDD chip supplier, and during its early years it diversified into consumer electronics and mobile chips, specially in Wi-fi and Bluetooth. But after Matt Murphy was selected CEO in 2016, the company started to focus on data infrastructure solutions. Starting 2018 it acquired companies covering Ethernet PHY, ASIC design, DSPs, Ethernet Switches and by 2022 it acquired Tanzanite Silicon Solutions. The acquisition allowed Marvell to gain know-how on CXL controllers. With other acquisitions such as Celestial AI, Marvell has built one of the broadest portfolios in data center connectivity. 

Approach and partnerships

Marvell has a diversified CXL portfolio.The Structera family allows CXL to use its full capabilities. In detail, It includes memory expansion chips such as the Structera X family,  near-memory computing with the Structera A family and switching capabilities for memory pooling in the Structera S portfolio. 

Its silicon also powers products from memory makers themselves. For instance, SK hynix co-developed its CMM-Ax module around Structera A, aimed at offloading the KV cache in long-context AI inference. In September 2026, Marvell also validated Structera X with NVIDIA’s Vera CPU, the processor inside NVIDIA’s Vera Rubin platform. 

Data centers already use Marvell’s CXL products to ease memory constraints. Marvell’s management expects this business to keep growing.

Financials and expectations

Marvell reported  $2.7B in revenue in the last quarter. Data center sales make up 79% of the company’s revenue. It has been growing at around 46% YoY. Non-GAAP gross margin was 58.9% and non-GAAP EPS was $0.94. The company guided third-quarter revenue to $3.15 billion and raised its outlook for both fiscal 2027 and fiscal 2028, now targeting roughly $18 billion in fiscal 2028 revenue. 

Astera Labs

Founded in 2017, Astera Labs is a much younger company. The company’s focus is on connectivity chips that move data inside servers. With all of their products named after constellations. Its first hit was the Aries family of PCIe retimers, which keep signals intact over longer distances. Aries became a standard component in AI servers. From there, Astera expanded into CXL memory controllers with Leo and Ethernet cable modules with Taurus. After its 2024 IPO, it added Scorpio fabric switches, now on track to become its largest product line.Unlike Marvell, Astera built its portfolio mostly in-house rather than through acquisitions. 

Astera’s approach

Astera Labs sells CXL controllers and add-in cards that host DIMMs from the major memory makers. Moreover, the company sits on the CXL Consortium’s board. In September 2026, it expanded its Leo family with products for CPU-attached expansion, pooling and DDR4 reuse, plus a new Leo X-Series that attaches memory directly to the GPU fabric to offload the KV cache. Astera says internal tests showed up to 62% faster time to first token. The family is sampling with hyperscalers today. The Leo X and E series allow for several topologies for memory. For instance, Memory expansion, Memory sharing and pooling, or PCIe Fabric Switching are standard for these product lines. 

Financials and expectations

Astera Labs posted record second-quarter 2026 revenue of $392.4 million, up 104% year over year and 27% sequentially. Its non-GAAP gross margin reached 73.7%, and its non-GAAP operating margin hit 39.1%. The company guided third-quarter revenue to between $540 million and $560 million. It closed the quarter with $1.25 billion in cash and marketable securities.

Penguin Solutions

Penguin Solutions has the longest history of the three companies. Its roots go back to SMART Modular Technologies, founded in 1988 as a maker of memory modules. After decades of changing owners, SMART returned to public markets in 2017 as SMART Global Holdings and began diversifying: it bought Penguin Computing, a builder of high-performance computing systems, in 2018. In 2024, the company renamed itself Penguin Solutions, signaling its shift toward designing, building and managing AI data centers.

In the memory business, and in contrast to Marvell and Astera, Penguin buys chips and turns them into modules, cards and complete systems including CXL memory modules. 

Penguin’s approach

Penguin approaches CXL from the system level. It sells memory modules and CXL memory expansion cards, along with a CXL-based Memory AI KV cache server. The company is prioritizing CXL into their product lines. Their memory portfolio also includes DRAM modules and Flash storage. 

Rest of the portfolio and CXL’s share of revenue

In fiscal 2026, Integrated Memory roughly doubled to $924 million, more than half of total sales. Penguin does not disclose CXL revenue, but says its CXL cards and KV cache server are already generating revenue and bookings.

Financials and expectations

Penguin’s fiscal 2026 sales grew 26% to $1.73 billion, and Integrated Memory roughly doubled to $924 million, reaching 60% of sales in the fourth quarter. Non-GAAP EPS rose 51% to $2.87. Management expects about 40% sales growth in fiscal 2027, to roughly $2.43 billion, and $4.45 in non-GAAP EPS. The weak spots are a 29.3% non-GAAP gross margin and negative operating cash flow of $152 million, as inventories nearly tripled. 

Conclusion

In conclusion, the memory shortage is not going away soon. Micron expects conditions to be much tighter in 2027 and 2028 than in 2026. Every gigabyte of DRAM that sits idle or ends up as scrap costs far more than a year ago. CXL offers a way to get more out of the memory data centers already own, by pooling stranded capacity and giving older DDR4 modules a second life.

Marvell, Astera Labs and Penguin Solutions have different approaches to the problem all taking advantage of CXL. Marvell has the broadest CXL portfolio and the deepest ties to memory makers, being still a tiny part of their broad business, therefore opportunity for expansion still exists. 

Astera, on the other hand, has the most advanced controllers and a direct path to GPU memory. It expects volume shipments of its Leo CXL controllers to two U.S. hyperscalers in 2027. Finally, Penguin Solutions turns memory into finished products. Memory already drives more than half of its sales, though at thin margins.

That said, cheaper DRAM from CXMT could weaken the case for reusing old modules. Software such as Google’s TurboQuant could also shrink the memory AI models need. But if the shortage lasts as long as suppliers expect, 2027 could mark CXL’s move from sampling to volume. 

Of the three, I see Marvell and Astera as the stronger ways to play CXL. Both design their own chips, which earns them gross margins of roughly 59% and 74%. Both have also won designs that should ramp in 2027. Penguin benefits from the same trend, but thin margins and negative cash flow make it a riskier bet.

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Jorge Aragón

Jorge Aragón is an embedded systems engineer with over 7 years of experience in the automotive industry. He has contributed to product development at companies including John Deere, International, and Aptiv. His engineering background gives him a comprehensive view of both the technical merits and the business value behind a product, a perspective that carries directly into his coverage of technology and investment markets. This dual interest led him to writing for 24/7 Wall St. and appearing as a guest on the AI Investor podcast. His articles cover stocks, ETFs, and advances in technology. Although his time with 24/7 Wall St. has been brief, his work has already been featured on Yahoo Finance and AOL.

Learn more about Jorge Aragon's experience here.

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